FPGA Implementation of SOBI to Perform BSS in Real Time

Apurva Rathi, Xun Zhang, Francois Vialatte

2012

Abstract

Blind Source Separation (BSS) is an effective and powerful tool for source separation and artifact removal in EEG signals. For the real time applications such as Brain Computer Interface (BCI) or clinical Neuro-monitoring, it is of prime importance that BSS is effectively performed in real time. The motivation to implement BSS in Field Programmable Gate Array (FPGA) comes from the hypothesis that the performance of the system could be significantly improved in terms of speed considering the optimal parallelism environment that hardware provides. In this paper, FPGA is used to implement the SOBI algorithm of EEG with a fixed-point algorithm. The results obtained show that, FPGA implementation of SOBI reduces the computation time and thus has great potential for real time.

Paper Citation

in Harvard Style

Rathi A., Zhang X. and Vialatte F. (2012). FPGA Implementation of SOBI to Perform BSS in Real Time . In Proceedings of the 4th International Joint Conference on Computational Intelligence - Volume 1: SSCN, (IJCCI 2012) ISBN 978-989-8565-33-4, pages 727-731. DOI: 10.5220/0004182507270731

in Bibtex Style

@conference{sscn12,
author={Apurva Rathi and Xun Zhang and Francois Vialatte},
title={FPGA Implementation of SOBI to Perform BSS in Real Time},
booktitle={Proceedings of the 4th International Joint Conference on Computational Intelligence - Volume 1: SSCN, (IJCCI 2012)},
year={2012},
pages={727-731},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0004182507270731},
isbn={978-989-8565-33-4},
}

in EndNote Style

TY - CONF
JO - Proceedings of the 4th International Joint Conference on Computational Intelligence - Volume 1: SSCN, (IJCCI 2012)
TI - FPGA Implementation of SOBI to Perform BSS in Real Time
SN - 978-989-8565-33-4
AU - Rathi A.
AU - Zhang X.
AU - Vialatte F.
PY - 2012
SP - 727
EP - 731
DO - 10.5220/0004182507270731